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? semiconductor components industries, llc, 2010 june, 2010 ? rev. 1 1 publication order number: NCP362/d NCP362 usb positive overvoltage and overcurrent protection with tvs for v bus and low capacitance esd diodes for data the NCP362 disconnects systems at its output when wrong vbus operating conditions are detected at its input. the system is positive overvoltage protected up to +20 v, overcurrent protected up to 750 ma, and receives protection from esd diodes for the high speed usb data and v bus lines. thanks to an integrated pmos fet, no external device is necessary, reducing the system cost and the pcb area of the application board. the NCP362 is able to instantaneously disconnect the output from the input if the input voltage exceeds the overvoltage threshold ovlo. thanks to an overcurrent protection, the integrated pmos turns off when the charge current exceeds the current limit (see options in ordering information). the NCP362 provides a negative going flag (flag ) output, which alerts the system that voltage, current or overtemperature faults have occurred. in addition, the device integrates esd diodes for v bus and data lines which are iec61000 ? 4 ? 2, level 4 compliant. the esd diodes for d+ and d ? are compatible with high speed usb thanks to an ultra low capacitance of 0.5 pf. features ? overvoltage protection up to 20 v ? undervoltage and overvoltage lockout (uvlo/ovlo) ? overcurrent protection ? transient voltage suppressor for v bus pin ? ultra low capacitance esd for data lines ? alert flag output and en enable pin ? thermal shutdown ? compliance to iec61000 ? 4 ? 2 (level 4) ? compliance machine model and human body model ? 10 lead udfn 2x2.5 mm package ? this is a pb ? free device applications ? usb devices ? mobile phones ? peripheral ? personal digital assistant ? mp3/mp4 players ? tv and set top boxes udfn10 case 517av pin connections http://onsemi.com marking diagrams in gnd flag en out q gnd 1 2 3 10 9 8 NCP362c v ersion (v bus tvs + d+/ ? esd low cap + ovp/ocp) ordering information see detailed ordering and shipping information in the package dimensions section on page 15 of this data sheet. xxxm xxx = specific device code m = date code = pb ? free package v bus tvs d+ 4 7 gnd d ? 56 pad1 gnd pad2 gnd in gnd flag en out gnd 1 2 3 10 9 8 NCP362a v ersion (v bus tvs + ovp/ocp) v bus tvs nc 4 7 gnd nc 5 6 pad1 gnd pad2 gnd in gnd flag en out gnd 1 2 3 10 9 8 NCP362b v ersion (d+/ ? esd low cap + ovp/ocp) nc d+ 4 7 gnd d ? 5 6 pad1 gnd pad2 gnd
NCP362 http://onsemi.com 2 figure 1. t ypical application circuit with wall adapter / v bus tvs protection (NCP362a) driver vref logic vin/vbus out thermal shutdown uvlo i limit >550 ma ovlo gnd vbus usb connector vbus gnd pin 1 battery system usb NCP362a d+ d ? pin 2 pin 3 pin 4 pin 5 d+ d ? id soft start bottom connector figure 2. typical application circuit with full integrated esd for usb (NCP362c) flag tvs charger en pin transceiver driver vref logic vin/vbus out thermal shutdown uvlo i limit >550 ma ovlo gnd vbus usb connector vbus gnd pin 1 battery system usb NCP362c d+ d ? pin 2 pin 3 pin 4 pin 5 d+ d ? id soft start flag tvs charger en pin transceiver d+ d ? ldo ldo
NCP362 http://onsemi.com 3 pin function description pin no. name type description 1 en input enable pin. the device enters in shutdown mode when this pin is tied to a high level. in this case the output is disconnected from the input. to allow normal functionality, the en pin shall be connected to gnd or to a i/o pin. this pin does not have an impact on the fault detection. 2 gnd power ground 3 in power input voltage pin. this pin is connected to the v bus . a 1 f low esr ceramic capacitor, or larger, must be connected between this pin and gnd. 4 v bus tvs input cathode of the v bus transient voltage suppressor diode. (NCP362a & NCP362c) this pin is not connected in the NCP362b 5 gnd power ground 6 d ? input cathode of the d ? esd diode. (NCP362b & NCP362c) this pin is not connected in the NCP362a 7 d+ input cathode of the d+ esd diode. (NCP362b & NCP362c) this pin is not connected in the NCP362a 8 gnd power ground 9 out output output voltage pin. the output is disconnected from the v bus power supply when the input voltage is above ovlo threshold or below uvlo threshold. a 1 f capacitor must be connected to this pin. the two out pins must be hardwired to common supply. 10 flag output fault indication pin. this pin allows an external system to detect a fault on v bus pin. the flag pin goes low when input voltage exceeds ovlo threshold. since the flag pin is open drain functional- ity, an external pull up resistor to v cc must be added. pad1 gnd power ground. must be used for power dissipation. see pcb recommendations. pad2 gnd power anode of the tvs and/or esd diodes. must be connected to gnd.
NCP362 http://onsemi.com 4 maximum ratings rating symbol value unit minimum v oltage to gnd (pins in, en , out, flag ) vmin ? 0.3 v maximum voltage to gnd (pin in) vmax in 21 v maximum voltage to gnd (pins en , out, flag ) vmax 7.0 v maximum dc current from vin to vout (pmos) (note 1) imax 600 ma thermal resistance, junction ? to ? air r ja 280 c/w operating ambient temperature range t a ? 40 to +85 c storage temperature range t stg ? 65 to +150 c junction operating temperature t j 150 c human body model (hbm) (note 2) pins en , in, out, gnd v bus tvs 2000 16000 v machine model (mm) (note 3) pins en , in, out, gnd v bus tvs 200 400 v iec 61000 ? 4 ? 2 pin v bus tvs contact air pins d+ & d ? contact air vesd 30 30 10 15 kv kv kv kv forward voltage @ 10 ma pin v bus tvs pins d+ & d ? 1.1 1.0 v moisture sensitivity msl level 1 ? stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. with minimum pcb area. by decreasing r ja , the current capability increases. see pcb recommendation page 9. 2. human body model, 100 pf discharged through a 1.5 k resistor following specification jesd22/a114. 3. machine model, 200 pf discharged through all pins following specification jesd22/a115.
NCP362 http://onsemi.com 5 electrical characteristics (min/max limits values ( ? 40 c < t a < +85 c) and v in = +5.0 v. typical values are t a = +25 c, unless otherwise noted.) characteristic symbol conditions min typ max unit input voltage range v in 1.2 20 v undervoltage lockout threshold uvlo v in falls below uvlo threshold 2.85 3.0 3.15 v uvervoltage lockout hysteresis uvlo hyst 50 70 90 mv overvoltage lockout threshold ovlo v in rises above ovlo threshold 5.43 5.675 5.9 v overvoltage lockout hysteresis ovlo hyst 50 100 125 mv v in versus v out dopout v drop v in = 5 v, i charge = 500 ma 150 200 mv overcurrent limit i lim v in = 5 v 550 750 950 ma supply quiescent current idd no load, v in = 5.25 v 20 35 a standby current i std v in = 5 v, en = 1.2 v 26 37 a zero gate voltage drain current i dss v ds = 20 v, v gs = 0 v 0.08 a flag output low voltage vol flag v in > ovlo sink 1 ma on flag pin 400 mv flag leakage current flag leak flag level = 5 v 5.0 na en voltage high v ih v in from 3.3 v to 5.5 v 1.2 v en voltage low v il v in from 3.3 v to 5.5 v 0.55 v en leakage current en leak en = 5.5 v or gnd 170 na timings start up delay t on from v in > uvlo to v out = 0.8xv in , see fig 3 & 9 4.0 15 ms flag going up delay t start from v in > uvlo to flag = 1.2 v, see fig 3 & 10 3.0 s output turn off time t off from v in > ovlo to v out 0.3 v, see fig 4 & 11 v in increasing from 5 v to 8 v at 3 v/ s. 0.7 1.5 s alert delay t stop from v in > ovlo to flag 0.4 v, see fig 4 & 12 v in increasing from 5 v to 8 v at 3 v/ s 1.0 s disable time t dis from en 0.4 to 1.2v to v out 0.3 v, see fig 5 & 13 v in = 4.75 v. 3.0 s thermal shutdown t emperature t sd 150 c thermal shutdown hysteresis t sdhyst 30 c esd diodes (t a = 25 c, unless otherwise noted) capacitance (note 7) pin v bus tvs pins d+ & d ? c 30 0.5 0.9 pf clamping voltage (notes 5, 6, 7) pin v bus tvs pins d+ & d ? v c @ i pp = 5.9 a @ i pp = 1.0 a 23.7 9.8 v working peak reverse v oltage (note 7) pin v bus tvs pins d+ & d ? v rwm 12 5.0 v maximum reverse leakage current i r @ v rwm 1.0 a breakdown voltage (note 4) pin v bus tvs pins d+ & d ? v br @ i t = 1.0 ma 13.5 5.4 v 4. v br is measured with a pulse test current i t at an ambient temperature of 25 c. 5. surge current waveform per figure 28 in esd paragraph. 6. for test procedures see figures 26 and 27: iec61000 ? 4 ? 2 spec, diagram of esd test setup and application note and8307/d. 7. esd diode parameters are guaranteed by design.
NCP362 http://onsemi.com 6 electrical characteristics (t a = 25 c unless otherwise noted) symbol parameter i pp maximum reverse peak pulse current v c clamping voltage @ i pp v rwm working peak reverse v oltage i r maximum reverse leakage current @ v rwm v br breakdown voltage @ i t i t test current i f forward current v f forward voltage @ i f p pk peak power dissipation c max. capacitance @v r = 0 and f = 1 mhz *additional v c , v rwm and v br voltage can be available. please contact your on semiconductor representative for availability. uni ? directional tvs i pp i f v i i r i t v rwm v c v br v f 1.2 v flag v out v in uvlo t start 0.8 v in t on NCP362 http://onsemi.com 7 voltage, current and thermal detection in out v in > ovlo or v in < uvlo conditions figure 7. voltage, current and thermal detection in out uvlo < v in < ovlo conditions figure 8.
NCP362 http://onsemi.com 8 typical operating characteristics figure 9. start up. vin=ch1, v out=ch2 figure 10. flag going up delay. vin=ch1, fl:ag=ch3 figure 11. output t urn off time. vin=ch1, vout=ch2 figure 12. alert delay. vout=ch1, flag=ch3 figure 13. disable time. en=ch4, vin=ch1, vout=ch2 figure 14. thermal shutdown. vin=ch1, vout=ch2, flag=ch3
NCP362 http://onsemi.com 9 typical operating characteristics figure 15. r ds(on) vs. temperature (load = 500 ma) figure 16. output short circuit figure 17. quiescent current vs. input voltage figure 18. overcurrent protection threshold vs. temperature figure 19. overcurrent protection threshold vs. input voltage r ds(on) (m ) temperature ( c) 0 50 100 150 200 250 300 0 50 100 150 ? 50 v in = 3.6 v v in = 5 v v in , input voltage (v) supply quiescent current ( a) 0 20 40 60 80 100 120 57 911 17 1 3 13 15 19 21 720 740 760 780 800 820 840 860 temperature ( c) overcurrent threshold (ma) v in = 5 v 050 ? 50 100 150 350 400 450 880 900 v in = 3.25 v 140 160 180 input voltage (v) 125 c 25 c ? 40 c 720 740 760 780 800 820 840 860 overcurrent threshold (ma) 3.5 4 3 4.5 5.5 880 900 125 c 25 c ? 40 c 5 v in = 3.6 v v in = 4.2 v v in = 5.25 v ? 25 c 0 c 85 c
NCP362 http://onsemi.com 10 figure 20. v bus tvs clamping voltage screenshot positive 8 kv contact per iec 61000 ? 4 ? 2 figure 21. v bus tvs clamping voltage screenshot negative 8 kv contact per iec 61000 ? 4 ? 2 figure 22. d+ & d ? clamping voltage screenshot positive 8 kv contact per iec61000 ? 4 ? 2 figure 23. d+ & d ? clamping voltage screenshot negative 8 kv contact per iec61000 ? 4 ? 2
NCP362 http://onsemi.com 11 operation NCP362 provides overvoltage protection for positive voltage, up to 20 v. a pmos fet protects the systems (i.e.: vbus) connected on the v out pin, against positive overvoltage. the output follows the vbus level until ovlo threshold is overtaken. undervoltage lockout (uvlo) to ensure proper operation under any conditions, the device has a built ? in undervoltage lock out (uvlo) circuit. during v in positive going slope, the output remains disconnected from input until v in voltage is above 3.0 v nominal. the flag output is pulled to low as long as v in does not reach uvlo threshold. this circuit has a 70 mv hysteresis to provide noise immunity to transient condition. figure 24. output characteristic vs. v in v in (v) 20 v ovlo uvlo 0 v out ovlo uvlo 0 overvoltage lockout (ovlo) to protect connected systems on v out pin from overvoltage, the device has a built ? in overvoltage lock out (ovlo) circuit. during overvoltage condition, the output remains disabled until the input voltage exceeds 6.0 v. flag output is tied to low until v in is higher than ovlo. this circuit has a 100 mv hysteresis to provide noise immunity to transient conditions . overcurrent protection (ocp) the NCP362 integrates overcurrent protection to prevent system/battery overload or defect. the current limit threshold is internally set at 750 ma. this value can be changed from 150 ma to 750 ma by a metal tweak, please contact your on semiconductor representative for availability. during current fault, the internal pmos fet is automatically turned off (5 s) if the charge current exceeds i lim . NCP362 goes into turn on and turn off mode as long as defect is present. the internal ton delay (4 ms typical) allows limiting thermal dissipation. the flag pin goes to low level when an overcurrent fault appears. that allows the microcontroller to count defect events and turns off the pmos with en pin. figure 25. overcurrent event example i lim t on v out i load overload retrieve normal operation flag output NCP362 provides a flag output, which alerts external systems that a fault has occurred. this pin is tied to low as soon as: 1.2 v < v in < uvlo, v in > ovlo, i charge > i limit , t j > 150 c. when NCP362 recovers normal condition, flag is held high. the pin is an open drain output, thus a pull up resistor (typically 1 m ? minimum 10 k ) must be provided to v cc . flag pin is an open drain output. en input to enable normal operation, the en pin shall be forced to low or connected to ground. a high level on the pin disconnects out pin from in pin. en does not overdrive an ovlo or uvlo fault. internal pmos fet the NCP362 includes an internal pmos fet to protect the systems, connected on out pin, from positive overvoltage. regarding electrical characteristics, the r ds(on) , during normal operation, will create low losses on v out pin, characterized by v in versus v out dropout.
NCP362 http://onsemi.com 12 iec 61000 ? 4 ? 2 spec. level test voltage (kv) first peak current (a) current at 30 ns (a) current at 60 ns (a) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 i peak 90% 10% iec61000 ? 4 ? 2 waveform 100% i @ 30 ns i @ 60 ns t p = 0.7 ns to 1 ns figure 26. iec61000 ? 4 ? 2 spec figure 27. diagram of esd test setup 50 50 cable tvs oscilloscope esd gun the following is taken from application note and8308/d ? interpretation of datasheet parameters for esd devices. esd voltage clamping for sensitive circuit elements it is important to limit the voltage that an ic will be exposed to during an esd event to as low a voltage as possible. the esd clamping voltage is the voltage drop across the esd protection diode during an esd event per the iec61000 ? 4 ? 2 waveform. since the iec61000 ? 4 ? 2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. on semiconductor has developed a way to examine the entire voltage waveform across the esd protection diode over the time domain of an esd pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all esd protection diodes. for more information on how on semiconductor creates these screenshots and how to interpret them please refer to and8307/d. figure 28. 8 x 20 s pulse waveform 100 90 80 70 60 50 40 30 20 10 0 020406080 t, time ( s) % of peak pulse current t p t r pulse width (t p ) is defined as that point where the peak current decay = 8 s peak value i rsm @ 8 s half value i rsm /2 @ 20 s
NCP362 http://onsemi.com 13 pcb recommendations the NCP362 integrates a 500 ma rated pmos fet, and the pcb rules must be respected to properly evacuate the heat out of the silicon. the udfn p ad1 must be connected to ground plane to increase the heat transfer if necessary from an application standpoint. of course, in any case, this pad shall be not connected to any other potential. by increasing pcb area, the r ja of the package can be decreased, allowing higher charge current to fill the battery. taking into account that internal bondings (wires between package and silicon) can handle up to 1 a (higher than thermal capability), the following calculation shows two different example of current capability, depending on pcb area: ? with 280 c/w (without pcb area), allowing dc current is 500 ma ? with 210 c/w (200 mm 2 ), the charge dc current allows with a 85 c ambient temperature is: i = (t j -t a )/(r ja x r dson ) i = 800 ma in every case, we recommend to make thermal measurement on final application board to make sure of the final thermal resistance. figure 29. 270 0 25 50 75 100 125 150 175 ja ( c/w) copper heat spreading area (mm 2 ) 250 230 210 190 175 150 1 oz c.f. 310 290 200 225 250 275 300 325350 2 oz c.f. 1 oz sim 2 oz sim figure 30. demo board layout top view bottom view
NCP362 http://onsemi.com 14 r1 10k r2 10k s1 strap2 1 2 u1 NCP362 /en 1 gnd 2 in 3 vbus 4 gnd 5 d ? 6 d+ 7 gnd 8 out 9 /flag 10 gnd 11 gnd 12 c2 1 f c1 1 f vcc j4 header 3 1 2 3 j3 gnd 1 2 tp1 vbus in 1 tp2 vbus tvs 1 tp3 vcc 1 tp4 /flag 1 tp5 /en 1 r3 10k tp6 id 1 j2 usb out 1 2 3 4 5 6 j5 header 11 1 2 3 4 5 6 7 8 9 10 11 figure 31. demo board schematic bill of material designation manufacturer specification r1, r2 10k - cms0805 1% c1, c2 murata ? grm188r61e105ka12d 1 f, 25 v, x5r, cm0805 NCP362 on semiconductor gnd jumper wm8083-nd jumper ground 1mm pitch 10.16 mm en , flag , in, v bus , id, vcc smb r 114 665 pcb plated gold usb input connector hirose ux60-mb-5s 5 pins usb mini usb output connector au y1006 r 4 pins usb a
NCP362 http://onsemi.com 15 ordering information device marking package shipping ? NCP362amutbg ada udfn10 (pb ? free) 3000 / t ape & reel NCP362bmutbg adg udfn10 (pb ? free) 3000 / tape & reel NCP362cmutbg adc udfn10 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd801 1/d. selection guide the NCP362 can be available in several undervoltage, overvoltage, overcurrent and clamping voltage versions. part number is designated as follows: a NCP362xxxmuxxtbg bc e d g f code contents a esd diode options a: tvs diode on pin 4 b: esd diodes on pins 6 & 7 c: option a & b b tvs pin 4 v rwm voltage ? : 12 v esd pin 6 & 7 v rwm voltage ? : 5 v c overcurrent typical threshold ? : 750 ma d uvlo typical threshold ? : 3.00 v e ovlo typical threshold ? : 5.675 v f tape & reel type b: = 3000 g pb ? free note: please contact your on semiconductor representative for availability of additional options.
NCP362 http://onsemi.com 16 package dimensions udfn10 2x2.5, 0.5p case 517av ? 01 issue o notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. c a seating plane d b e 0.15 c a3 a a1 2x 2x 0.15 c dim a min millimeters 0.45 a1 0.00 a3 0.13 ref b 0.20 d 2.50 bsc d2 1.35 e 2.00 bsc 0.95 e2 e 0.50 bsc pin one reference 0.08 c 0.10 c note 4 a 0.10 c note 3 l e d2 e2 b b 5 6 10x 1 10 10x 0.05 c 0.20 l *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. soldering footprint* 1.55 2.30 0.50 1.13 0.45 dimensions: millimeters f a 0.10 cb d3 a 0.10 cb k d3 0.30 f 1.08 bsc k 0.20 0.35 1.15 pitch 0.50 10x 0.55 0.05 0.30 1.55 1.15 0.30 0.50 --- max ??? ??? a1 a3 detail b mold cmpd exposed cu optional construction l1 detail a l optional constructions l --- l1 0.15 top view side view bottom view detail b detail a f a 0.10 cb 10x 1.13 1 outline package on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, in cluding without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different a pplications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical e xperts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc prod uct could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney f ees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was neglig ent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 NCP362/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc a sales representative

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